.. Fast-paced environment Physically demanding Attention to detail Bending, crouching, kneeling Standing for extended periods Handling heavy loads Weight handling Up to 45 kg (100 lbs) Personal suitability Accurate Client focus Dependability Excellent oral communication Reliability Team player Efficient .. read more
About MarvellAt Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions. Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform—for the better.The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing. If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.The OpportunityIn this position, you will join Marvell CE AMS-IP DSP architecture team to contribute to state-of-the-art high-speed SerDes IPs used in a variety of products for the hyperscale could data center applications. You will participate in the verification, and optimization algorithms for PCIe and Ethernet solutions for 100G+ and 200G per lane data rates. You will be exposed to many technologies, including 5nm, 3nm, and 2nm developments, that span switch, PHY, compute, 5G baseband, cloud data center, and custom ASIC programs.Job Responsibilities:Create DSP and FEC hardware block specifications appropriate for RTL implementation.Collaborate with analog and digital team to understand architecture and implementation constraints.Write DSP algorithm specification and provide the algorithm in C/C++ or Python.Work with digital team/firmware team to implement DSP algorithm in hardware/firmware.Hands-on involvement in post-silicon performance tuning and optimization.Provide guidance on test plans for lab characterization.Provide support for internal/external customers deploying SerDes IPs.Requirements:Minimum Qualifications:Preferred Qualifications:Deep understanding of digital communication and signal processing theory, including channel equalization, timing recovery, detection, and estimation.Experience with FEC (RS, BCH, soft decoding) is a plus.Experience with high-speed wireline transceiver using analog-based and ADC-based architecture is a big plus.Good programming skills in C/C++, Python or MATLAB.Knowledge of Ethernet, PCIE, CPRI standards is a plus.Work experience with high-speed SerDes (NRZ, PAM4) and understanding of analog circuit is a plus.Team player who is willing to take on a variety of projects, and self-motivated.#LI-TD1The PerksWith competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We’ll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it’s like to work at Marvell, visit our page.Your FutureMarvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.