Senior FPGA Designer

Lumentum is seeking to hire a Senior FPGA Designer for our Ottawa based R&D team. What do we do? Lumentum (NASDAQ: LITE) is a market-leading manufacturer of innovative optical and photonic products enabling optical networking and commercial laser customers worldwide. Lumentum’s optical components and subsystems are part of virtually every type of telecom, enterprise, and data center network. Lumentum’s commercial lasers enable advanced manufacturing techniques and diverse applications including next-generation 3D sensing capabilities. Lumentum is headquartered in San Jose, California with R&D, manufacturing, and sales offices worldwide. Telecom Transport Product R&D is based in Ottawa, On. For more information, visit www.lumentum.com. Lumentum welcomes and encourages applications from people with disabilities. Accommodations are available on request for candidates taking part in all aspects of the selection process. As a global, multi-cultural company driven by innovation, we are building a diverse and inclusive culture where differences are valued. We are unified in our commitment to live our Guiding Principles: Innovate, Engage, Deliver, Excel, and Win. Our differences make us stronger, more creative, and capable of delivering better results. What will you do? This full-time position is an opportunity to work in a leading high technology telecommunications company, with a multidisciplinary team that develops a broad range of optical telecommunication products including next-generation WSS & amplifiers. In addition to working closely with the rest of the FPGA team, you will collaborate with other R&D engineering groups including hardware, firmware, algorithms, and verification. In this role, you will be responsible for the following… FPGA design architecture & implementation of control & datapath logic IP integration and verification Simulation and lab validation (including scripts generation) Synthesis, constraints optimization, thorough build & timing reports analysis Design reviews Integration, debugging & verification support Architecture, design and test documentation Contributions to best practices and methodologies definition Mentoring of junior engineers Required Qualifications [Must-Have]: Solid experience in ASIC or FPGA Verilog/SystemVerilog design, simulation, synthesis, constraints, timing analysis, clock domain crossing Clear, robust and well commented coding style Excellent verbal & written communication skills Team player able to work well with different functional groups and contribute effectively to multi-designer projects Thorough and detail oriented Advantage Qualifications [Nice-To-Have]: Solid experience with AMD/Intel FPGAs and tools Embedded processor SoC design Digital signal processing High-Level Synthesis C / Verilog cosimulation Experience with AXI interfaces VHDL, C, Csh, Tcl, Python, Perl Constrained random verification, SVA Familiarity with Linux environment development